[geeks] Sunblade 1K vs MacG4 vs Ultra 60

[Dave McGuire]

On December 12, Zach Malone wrote:
> Essentially, they can set up a bit slicing core for RC5 in the small vector
> engine on the G4.  They cannot fit one in the P4's vector engine (apparently
> thats too small to actually use), and I don't believe any UltraSPARC

  That's amusing, because the G4's is pretty damn small!

> processors have a vector engine (correct me if I'm using marketese, but that
> is the term, correct?), on top of which, the (RC5) core is not optimized
> well.

  The correct term is "SIMD"...Single Instruction Multiple Data,
analogous to vector instructions in serious processors.

  In an UltraSPARC, for example, you an pack four byte values into a
32-bit word and perform the same operation on all four of them
separately with one instruction...a Single Instruction operates on
Multiple elements of Data, SIMD.  In a typical PVP-architecture Cray,
one instruction can operate on 64 64-bit data elements with one
instructions.

  These efforts...AltiVec, MMX, VIS, and a few others...PA-RISC and
Alpha have something similar I believe...are attempts to bring
techniques commonly used in supercomputers to microprocessor
technology.  The bad thing about it is that people are calling these
tricks "new".  Heck, the CDC 7600 had vector instructions thirty years
ago!

  Another form of multiprocessing that we see a lot of these days is
MIMD...multiple instruction, multiple data...a typical multiprocessor
system.

   -Dave

-- 
Dave McGuire
St. Petersburg, FL