[rescue] RE: divide and conquer? (CPU design)

[Dave McGuire]

On June 21, Ken Hansen wrote:
> There are somethings in life where I defer to the engineering department, like high-speed computing and automatic transmissions*. I look to Cray, and see that their latest designs started to use (IIRC, Dave McGuire feel free to correct me) collections of "off-the-shelf" CPUs as opposed to dividing the CPU into numerous components, as you describe.

  Umm, I have to correct you here, Ken.  For many years, Cray's product
line has been split into two groups of machines...the MPP machines
(Massively Parallel Processors) and the PVP machines (Parallel Vector
Processors).  The MPP machines are based on nearly off-the-shelf
processors (SuperSPARC for the CS6400, modified Alphas for the T3D and
T3E) and are good at certain types of work.  The PVP machines are
currently built around (and have been for some time) multiprocessor
YMP architecture vector processors which won't even come close to
fitting on a single chip, not even at today's densities.  Examples of
current Cray PVP machines are the T90 and the SV1, with the SV2 being
close to ready.

  The MPP and PVP line have coexisted for some time.  The MPP machines,
however, could theoretically be replaced by roomfuls of little buzzing
PeeCees, except where the aspect of shared memory benefits certain
types of computations.  The MPPs are technically shared-memory
multiprocessors, whereas a roomful of buzzing PeeCees is nothing more
than a simple cluster.


                 -Dave McGuire