[rescue] RS/6000 board ID

[Julius Sridhar]

On Wed, 13 Feb 2002, Jonathan C. Patschke wrote:

> > The way POWER4 systems are organized is that they have two cores on each
> > chip.  Each core has 512kB/512kB level 1 cache.  The module has an 8MB (or
> > is it 10MB?) level 2 cache for both cores, and the processor board (with
> > two POWER4's) has 128MB level 3 cache.
>
> Uhm.  Damn.  They don't screw around, do they?  I have servers with less
> memory than that.
>
> So, is main memory optional?  Can you just bootstrap the kernel into the
> cache? :)

Hehehe.  These machines have a minimum configuration of 2GB RAM, if memory
serves.  And they can connect into an RS/6000 SP switch for future
expansion.

Peace...  Sridhar