[rescue] rescue Digest, Vol 129, Issue 15

[Michael Thompson]

> Date: Sun, 25 Aug 2013 17:30:25 -0700
> From: "r.stricklin" <bear at typewritten.org>
> Subject: Re: [rescue] Sun VME P2 connector pinout
>
> On Aug 25, 2013, at 5:22 PM, Michael Thompson wrote:
>
> > Most had the A & C rows of the J2 and the B row of the J3 bused.
> > A common layout had slots 1-7 and 10-12 bused like this.
>
> I see that my request was unintentionally ambiguous. (@:
>
> I'm looking for information regarding which signal is present on which pin
> of
> P2---which, as you mention, includes row B of J3, as well as rows A and C
> of
> J2.
>
> ok
> bear.
>
> --
> until further notice
>

The pinout of the A, B, & C rows of the J1, and the B row of the J2 is
standard VME.

The A & C rows of the J2 and the B row of the J3 was used for a
CPU<->Memory bus, or a graphics bus.
I think that the pinout of the memory bus differed between the processors.

-- 
Michael Thompson