[rescue] SBusFPGA update: USB Host, 256 MiB DDR3 RAM disk, ... (Was: Re: A SBus card for SPARCstation designed in 2020...)

[Joshua D. Boyd]

On August 22, 2021 9:03:51 AM EDT, Romain Dolbeau <romain at dolbeau.org> wrote:
>Hello,
>
>Following up on a previous post...
>
>Le sam. 12 dC)c. 2020 C  19:12, Romain Dolbeau <romain at dolbeau.org> a C)crit
>:
>> Following up on my own idea, this might interest some people on these
>lists:
>> Le jeu. 17 sept. 2020 C  15:29, Romain Dolbeau <romain at dolbeau.org> a
C)crit
>:
>> > The motivation - I'm kind of wondering how much efforts it would take
>> > to put a modern [not-so-]small FPGA on a SBus card
>
>The current status is visible in the repository
><https://github.com/rdolbeau/SBusFPGA> (and a picture on Reddit
><https://www.reddit.com/r/vintagecomputing/comments/p98pl1/sparcstation_20_w
i
>th_fpgabased_256_mib_ddr3_ram/>).
>
>The completely re-written gateware includes a 256 MiB RAM disk (for
>e.g. fast swap) and USB OHCI host controller. It only took 23 years to
>get USB 1.1 on a SPARCstation :-) (and the hardware needs a redesign,
>as there's no proper connector in the current version, the picture
>shows the ugly truth). Still working on crypto, but this time with an
>elliptic curve 25519 engine (for e.g. ssh handshake), and the SW side
>is still the primary issue... The micro-sd could be supported in HW
>with the Litex gateware, but the specific driver would need porting
>from Linux to NetBSD (unlike USB OHCI which only needed the SBus ->
>OHCI shim, the OHCI driver is NetBSD's stock one, and having USB mass
>storage support makes the micro-sd less critical).
>
>There's no boot support for USB; there's a stack available in Forth
>for recent versions of OpenFirmware but it won't work on an OpenBoot
>2.x system like the SS20 (and I couldn't figure out how to make it
>work/backport).
>
>#####
>(dolbeau)ss20:~> cpuctl identify 0
>cpu0: mid 8: TI,TMS390Z55 @ 60 MHz, on-chip FPU
>cpu0: physical 20K instruction (64 b/l), 16K data (32 b/l), 1024K
>external (32 b/l): cache
>enabled
>cpu0: SPARC v8
>(dolbeau)ss20:~> cpuctl identify 1
>cpu1: mid 10: TI,TMS390Z55 @ 60 MHz, on-chip FPU
>cpu1: physical 20K instruction (64 b/l), 16K data (32 b/l), 1024K
>external (32 b/l): cache
>enabled
>cpu1: SPARC v8
>(dolbeau)ss20:~> usbdevs
>addr 1: OHCI root hub, NetBSD
>addr 2: USB 2.0 Hub, vendor 1a40
> addr 3: PS/2+USB Mouse, vendor 04f3
>(dolbeau)ss20:~> swapctl -l
>Device               512-blocks     Used    Avail Capacity  Priority
>/dev/sbusfpga_sdram0     524288        0   524288     0%    0
>#####
>(the intermediate USB Hub supplies the needed VBus as I don't have
>power management on the board).


Your work on this is very exciting.