[rescue] New Origin 3400 in Ottawa
Jonathan Patschke
jp at celestrion.net
Thu Jan 30 11:36:58 CST 2020
On Mon, 27 Jan 2020, r.stricklin wrote:
> Sure, but a lot of these new systems are actually NUMA architectures under the
> covers (I'm not totally up to date on all the various vendor's models, but
> certainly there's been a nonzero number of the multi-socket x86_64 proliants
> we've ordered in the last half decade that have been NUMA - not sure about
> cache-coherent vs. not though... I think, not).
Multi-socket Xeon systems are ccNUMA since Haswell (using MESIF), and
multi-socket AMD systems have been cache-coherent long before (1st- or
2nd-generation Opteron, using MOESI).
Single-socket AMD Epyc systems even have to run cache-coherent because of
how separate the individual complexes are on the multi-chip module. Even
single-socket AMD Naples systems can slice the hardware into 4 NUMA nodes
for reduced I/O latency. The Rome systems I've seen have much better
worst-case latency and tend to run in a single node for single-socket
setups.
NUMA without cache-coherency has pretty limited applications. Outside of
ARM, it's effectively implied anymore.
--
Jonathan Patschke | "The more you mess with it, the more you're
Austin, TX | going to *have* to mess with it."
USA | --Gearhead Proverb
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